The 8051 is still a very popular controller which is being embedded in application specific system on chip (SoC) designs in today’s market. This can be seen from its usage in Wireless Sensor Networks, Zigbee, RFID, and removable storage market areas. The Palm8051 has been designed keeping in mind this particular market.
The Palm8051 core is an instruction set compatible implementation of the MCS-51 family. The Palm8051 executes the instruction in a single clock cycle instead of the original 12 cycles per instruction execution time. The I/O ports of the core have been simplified by removing unnecessary muxing on the ports to make it fully compatible with today’s system on chip (SoC) design practices.
Feature
- Single Clock Cycle Instruction Execution
- Up to 8KBytes of On-chip Program Memory
- 128 bytes of On-chip Data RAM
- Up to 64Kbytes of external Program Memory
- Up to 56Kbytes of external Data Memory
- Standard 2 16-bit timers/counters
- 6 Source/5 Vector interrupt structure with two priority levels.
- No multiplexed I/O ports
- 31 General purpose I/O Ports
- Full Duplex Serial Port
- Wait state support for slow external peripherals
- Fully synchronous design