The AES core from Palmchip is a dedicated hardware accelerator that performs the cipher/decipher function on incoming data, and one of the few cores on the market which comes with an integrated bus interface and DMA engine. The AES core supports both PIO and DMA mode of operation. The AES core supports the three AES key sizes 128, 192, 256-bit, and performs offline key expansion. It supports AES ECB, CBC, CTR and CCM modes of operation and is fully compliant with IEEE 802.16e and ZigBee specifications for CTR and CCM modes.
Features
AES Modes
- AES-128bit encryption/decryption
- Available in 128-bit or 32-bit data path mode
- Programmable ECB, CBC, CTR and CCM support built-in
- Programmable 128, 192, 256-bit AES Key size support
- Key expansion and storage for expanded Key support built-in
- Fully compliant with FIPS 197 specifications
- Fully compliant with IEEE 802.16e and ZigBee specifications for CTR and CCM modes
- For AES CCM mode Additional Authenticated data (AAD) length from 0 to (2 16 -1) octets is supported
DMA
- Full-Duplex 2-channel DMA for transmitting and receiving data
- Independent transmit and receive FIFO's
- Command Queue or Descriptor mode support
- Scatter-gather operations supported
- Memory to Memory data transfer supported
- Pause, abort features implemented
CPU Interface
- Master interface for the DMA controller
- Target interface for programmable registers
- Two deep input queue for PIO mode to improve AES data throughput
- 32-bit data bus
- Palmchip CoreFrame II bus interface(AHB support available on request)
Clock Speed & Gate Count
- In TSMC 0.18u including all buffers and Key expansion RAM
- All clock speed and gate count reports are based on when optimizing the design for speed.
AES-Data-Path | Clock Speed | Gate Count | SBOX Implementation |
128 bit | 111 MHZ | 113398 | Non Lookup table |
128 Bit | 149 MHZ | 133345 | Look up table |
32 bit | 151 MHZ | 95742 | Non Look up Table |
32 bit | 151 MHZ | 98623 | Look up Table |